Analog Peripherals
SAR ADC
12-bit resolution (´F206)

• 8-bit resolution (´F220/1/6)
• ±1/4 LSB INL (8-bit) and ±2 LSB INL (12-bit)
• Up to 100 ksps
• Up to 32 channel input multiplexer; each port
• I/O pin can be an ADC input

Two Comparators

• 16 programmable hysteresis states
• Configurable to generate interrupts or reset

VDD monitor and brown-out detector

On-Chip JTAG Debug

• On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (No emulator required)
• Provides breakpoints, single-stepping, watchpoints, stack monitor
• Inspect/modify memory and registers
• Superior performance to emulation systems using ICE-chips, target pods, and sockets
• Complete, low cost development kit

High Speed

• 8051 mC Core
• Pipelined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks
• Up to 25MIPS Throughput with 25MHz Clock
• Expanded Interrupt Handler

Memory

• 256 bytes internal data RAM
• 1024 bytes XRAM (available on ´F206/226/236)
• 8 kB Flash; In-system programmable in 512 byte sectors

Digital Peripherals

• Four byte wide Port I/O; All are 5 V tolerant
• Hardware UART and SPI bus
• 3 general purpose 16-bit counter/timers
• Dedicated watch-dog timer
• Bi-directional reset
• System clock: internal programmable oscillator, external crystal, external RC, or external clock

Supply Voltage 2.7 to 3.6 V

• Typical operating current: 10 mA @ 25 MHz
• Multiple power saving sleep and shutdown modes

(48-Pin TQFP and 32-Pin LQFP Version Available)
Temperature Range: –40 to +85 °C